Copper sliver
The 'Copper sliver' diagnostic is a Design for Manufacturing (DFM) check in KiCad PCB Editor (pcbnew) identified by the rule code copper_sliver (DRCE_COPPER_SLIVER). It triggers when DRC identifies acute, wedge-shaped copper geometry whose inclusion angle or minimum feature length falls below fabrication safety thresholds. These slivers pose chemical etching and board reliability hazards.
In KiCad's PCB Editor Design Rules Check (DRC), the 'Copper sliver' diagnostic indicates that a copper shape (such as a filled copper zone, track intersection, teardrop transition, or polygon cutout) contains an excessively sharp, acute wedge or narrow copper protrusion. In printed circuit board fabrication, copper slivers are narrow wedges of copper that can detach during the photolithography and chemical etching stages. When a sliver flakes off the board, it floats in the chemical bath and may redeposit elsewhere across copper features, creating unintended electrical short circuits. Alternatively, slivers that remain attached can peel up during thermal cycles or wave soldering, creating intermittent electrical shorts or mechanical reliability defects. KiCad flags these geometry features to ensure high manufacturing yield and compliance with PCB fabricator DFM rules.
The diagnostic is emitted by DRC_TEST_PROVIDER_SLIVER_CHECKER during KiCad's design rule inspection across copper layers. KiCad checks copper polygon boundaries against geometric thresholds: 1. Sliver Angle Tolerance (DRCSliverAngleTolerance, default 20 degrees): Detects acute polygon vertices where the angle between adjacent segment edges is smaller than the specified threshold. 2. Sliver Minimum Length (DRCSliverMinimumLength, default 0.0008 mm): Flags very short acute copper features produced during polygon clipping and boolean operations. Common triggers include: - Copper zones filling into tight, narrow crevices between closely placed pads, vias, or conflicting clearance boundaries. - Oblique trace junctions where tracks enter pads or connect to other tracks at sharp acute angles. - Teardrop generation around through-hole or SMD pads with constrained clearances causing narrow apex clips. - Polygon boundary artifacts created during boolean subtraction of zone knockouts and overlapping keepouts.
(kicad_pcb
(version 20240108)
(generator "pcbnew")
(generator_version "9.0")
(general
(thickness 1.6)
)
(paper "A4")
(layers
(0 "F.Cu" signal)
(31 "B.Cu" signal)
(48 "Edge.Cuts" user)
)
(setup
(pad_to_mask_clearance 0)
)
(net 0 "")
(net 1 "GND")
(zone
(net 1)
(net_name "GND")
(layer "F.Cu")
(uuid "00000000-0000-0000-0000-000000000001")
(hatch full 0.5)
(connect_pads (clearance 0.2))
(min_thickness 0.01)
(filled_areas_thickness no)
(fill yes (thermal_gap 0.2) (thermal_bridge_width 0.3))
(polygon
(pts
(xy 100 100)
(xy 120 100)
(xy 100.05 100.01)
(xy 100 120)
)
)
)
)
Eliminate the acute copper wedge by increasing zone minimum thickness, adding corner smoothing fillets, or rerouting traces to eliminate acute angles.
```kicad-sexpr
(kicad_pcb
(version 20240108)
(generator "pcbnew")
(generator_version "9.0")
(general
(thickness 1.6)
)
(paper "A4")
(layers
(0 "F.Cu" signal)
(31 "B.Cu" signal)
(48 "Edge.Cuts" user)
)
(setup
(pad_to_mask_clearance 0)
)
(net 0 "")
(net 1 "GND")
(zone
(net 1)
(net_name "GND")
(layer "F.Cu")
(uuid "00000000-0000-0000-0000-000000000001")
(hatch full 0.5)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(filled_areas_thickness no)
(fill yes (thermal_gap 0.2) (thermal_bridge_width 0.3) (smoothing fillet) (radius 0.5))
(polygon
(pts
(xy 100 100)
(xy 120 100)
(xy 120 120)
(xy 100 120)
)
)
)
)
```
KiCad Source Code: pcbnew/drc/drc_test_provider_sliver_checker.cpp