Engineering error reference

Canonical explanations and fixes for CAD, PCB, firmware, and manufacturing toolchain errors.

Browse by toolchain

arduino — 2 pages

cadquery — 3 pages

kicad — 30 pages

manifold — 6 pages

opencascade — 13 pages

platformio — 1 page

tscircuit — 11 pages

PlatformIO Linker Error: Undefined Reference to 'setup' or 'loop'

The linker failed to find the setup() or loop() function definitions required by the Arduino framework's core main() entry point.

PCB Trace Missing Error (pcb_trace_missing_error)

The tscircuit DRC engine emits a pcb_trace_missing_error when a logical trace defined in the schematic lacks a corresponding physical layout path on the board. This usually indicates that the autorouter failed to find a valid path due to congestion or obstacles.

PCB Via Clearance Error

A design rule check error indicating that two vias on a printed circuit board are placed closer than the required minimum clearance distance.

schematic_port_not_found

The tscircuit compiler emits this diagnostic when a schematic component, trace, or net connection attempts to reference a port that does not exist on the specified symbol.

Simulation Unknown Experiment Error (circuit-json)

The simulation_unknown_experiment_error diagnostic is emitted when a tscircuit simulation engine encounters an analysis or experiment type it does not recognize, resulting in an error element within the Circuit JSON artifact.

source_invalid_component_property_error

Emitted in the compiled Circuit JSON when a user-provided component property fails validation or does not match the expected format.

SourcePinMustBeConnectedError in tscircuit

An electrical rules check diagnostic generated by @tscircuit/checks when a component pin marked as requiring a connection is left floating without any assigned source traces.

SourceTraceNotConnectedError

This diagnostic indicates that a trace was declared with selectors that could not be resolved to any valid ports. The tscircuit compiler emits this error during evaluation when trace endpoints fail to match existing components or pins.

pcb_port_not_connected_error

A diagnostic indicating that a component port assigned to a net lacks a physical trace connection on the PCB.

source_i2c_misconfigured_error

Emitted when incompatible I2C pins, such as Serial Data (SDA) and Serial Clock (SCL), are erroneously connected to the same electrical network.

Unknown Error Finding Part

The circuit builder encountered an unhandled exception or unexpected payload (e.g., HTML instead of JSON) while querying an external parts registry.

OpenCASCADE Standard_ConstructionError Exception

Standard_ConstructionError is an exception thrown by Open CASCADE Technology (OCCT) when a geometric entity or topological shape cannot be built due to invalid input parameters or violated mathematical constraints.

Standard_DimensionError in Open CASCADE Technology

Standard_DimensionError is an exception in Open CASCADE Technology (OCCT) indicating an operation was attempted on operands, such as matrices, vectors, or arrays, that have incompatible dimensions.

Standard_DimensionMismatch in Open CASCADE Technology

An exception raised in Open CASCADE Technology (OCCT) when an operation encounters data structures, such as arrays, vectors, or matrices, with incompatible bounds, sizes, or dimensions.

Standard_DivideByZero in Open CASCADE Technology

Standard_DivideByZero is an OCCT exception signaling an attempt to divide by zero. It is explicitly thrown by geometric routines or emitted via hardware traps to prevent undefined behavior.

Standard_MultiplyDefined

In Open CASCADE Technology, Standard_MultiplyDefined is a C++ exception thrown when an attempt is made to bind or define an element using a key that already exists in a context requiring strict uniqueness, such as within an NCollection_DoubleMap.

OCCT Standard_NegativeValue Exception

Standard_NegativeValue is an OCCT exception raised when a geometric or topological algorithm receives a negative parameter for a quantity that must be strictly positive, such as a radius or offset distance.

Standard_NoSuchObject

An exception raised by Open CASCADE Technology (OCCT) when an operation attempts to access a requested geometric or topological object that does not exist, or queries a property undefined for the current state.

Open CASCADE Standard_OutOfRange Exception

An exception thrown by the Open CASCADE Technology (OCCT) geometry kernel when an index or parameter falls outside the valid bounds of a collection or geometric entity. This commonly occurs due to 0-indexing errors, as many OCCT collections dynamically define bounds and are conventionally 1-indexed.

Standard_Overflow Exception

Standard_Overflow is an Open CASCADE Technology (OCCT) diagnostic exception emitted when a numeric operation computes a value exceeding the bounds of the underlying data type, such as DBL_MAX for a floating-point type [1].

Standard_ProgramError in Open CASCADE

A core OCCT exception raised when a critical programmatic invariant is violated, most commonly by attempting to create an intrusive handle to a stack-allocated transient object.

Open CASCADE Standard_RangeError

`Standard_RangeError` is a C++ exception thrown by Open CASCADE Technology (OCCT) when an index accesses a collection or mathematical structure outside its defined bounds.

Standard_Underflow in OCCT

The `Standard_Underflow` diagnostic is a C++ exception in Open CASCADE Technology (OCCT) raised when a floating-point calculation evaluates to a subnormal value. It typically occurs when hardware floating-point exceptions (FPE) are enabled globally via `OSD::SetSignal()` and caught using the `OCC_CATCH_SIGNALS` macro.

FaceIDWrongLength in Manifold-3D MeshGL Construction

The Manifold-3D kernel emits a FaceIDWrongLength error when a supplied MeshGL object provides a faceID array whose length does not match the exact number of triangles in the mesh.

Manifold::Error::InvalidConstruction

The Manifold geometry kernel emits InvalidConstruction when attempting a Boolean operation (such as union, intersection, or difference) where one or more input operands are in an error state. This occurs to prevent evaluating broken geometry and producing inconsistent states.

MergeIndexOutOfBounds

The Manifold geometry library emits MergeIndexOutOfBounds when a provided MeshGL structure specifies merge indices that exceed the declared number of property vertices (numProp).

MergeVectorsDifferentLengths

The Manifold library emits this error when the mergeFromVert and mergeToVert arrays in a MeshGL structure have different lengths, preventing valid vertex merging.

Manifold MissingPositionProperties Error

The MissingPositionProperties diagnostic in Manifold indicates that an input mesh lacks the mandatory three leading property channels needed to define spatial vertex positions. It is emitted when constructing geometry from a mesh wrapper containing insufficient coordinate data.

manifold::Error::PropertiesWrongLength

The Manifold geometry kernel rejects a MeshGL object because its flattened `vertProperties` array length is not evenly divisible by the specified `numProp` stride.

cadquery.cqgi.InvalidParameterError

An error raised by the CadQuery Gateway Interface (CQGI) when an execution environment provides a parameter override value that cannot be coerced to the expected type or violates defined parameter constraints.

CadQuery CQGI NoOutputError

The NoOutputError occurs in a CadQuery script executing inside a CQGI container (like CQ-Editor or cq-cli) when the script generates geometry but fails to export it to the environment by calling the injected show_object() method.

cadquery.cqgi.ScriptExecutionError

A `ScriptExecutionError` is raised by the CadQuery Gateway Interface (CQGI) when a script provided for execution contains invalid Python syntax, preventing it from being parsed.

Arduino Linker Error: Undefined Reference to 'loop'

The Arduino compiler toolchain requires every sketch to define a loop() function. Omitting this function causes a linker error when the core attempts to resolve it during compilation.

KiCad ERC Diagnostic: [pin_not_connected]

KiCad's Schematic Editor emits the [pin_not_connected] ERC diagnostic when a symbol pin is left floating without an explicit wire, label, or 'No Connect' flag.

KiCad ERC: Input Pin Not Driven by Output Pin

The KiCad Electrical Rules Checker (ERC) reports [pin_not_driven] when an Input or Power Input pin is not connected to a corresponding Output or Power Output pin. This commonly occurs when power is supplied via a passive component, such as a connector or switch, without an explicit power source defined on the net.

ERC [pin_to_pin]: Pin Conflict Problem

The KiCad Schematic Editor's Electrical Rules Checker (ERC) emits a `[pin_to_pin]` diagnostic when two or more connected pins have electrical types that clash according to the project's Pin Conflicts Map, such as connecting two 'Output' pins together.

KiCad ERC: A pin with a "no connection" flag is connected

KiCad's Electrical Rules Check (ERC) emits this diagnostic when a schematic pin is marked with an explicit "No Connection" (NC) flag but is concurrently connected to a wire, bus, label, or component.

Copper connection too narrow

The KiCad DRC engine has detected a copper area that necks down to a width smaller than the configured minimum connection width constraint. This commonly occurs at thermal relief spokes, zone fill bottlenecks, or track-to-pad intersections.

Copper sliver

The Copper sliver DRC violation in KiCad detects extremely narrow, wedge-shaped protrusions of copper. These tiny slivers pose a hazard during PCB manufacturing because they can detach and cause electrical shorts.

Creepage Violation

A 'Creepage violation' DRC error in KiCad indicates that the shortest surface distance between two conductive items is less than the required minimum defined in the board's custom rules.

Duplicate footprints

The KiCad Design Rule Checker detected multiple footprints on the PCB sharing the exact same reference designator, causing ambiguity in schematic parity.

KiCad Extra Footprint DRC Violation

The KiCad PCB Editor (pcbnew) DRC engine triggers an "Extra footprint" violation when a footprint exists on the board but lacks a matching symbol in the schematic and is not explicitly marked as a board-only item.

Global label not connected anywhere else in the schematic

KiCad's Electrical Rules Checker (ERC) reports this warning when a global label appears only once in the entire schematic hierarchy, indicating it fails to form an inter-sheet connection.

Global label only appears once in the schematic

An Electrical Rules Check (ERC) diagnostic in KiCad that warns when a global label is placed only once across the entire schematic, indicating that it does not form any global connections.

KiCad ERC: Input pin not driven by any Output pins

The KiCad Electrical Rules Checker (ERC) detected a symbol pin defined as an Input connected to a net that lacks a valid driving source.

KiCad ERC: Input Power Pin Not Driven By Any Output Power Pins

An Electrical Rules Check (ERC) diagnostic emitted when a component's power input pin connects to a net without an active power output source. This frequently occurs when power routes through passive components or generic connectors.

KiCad DRC Violation: Items shorting two nets

A Design Rule Check (DRC) error in the KiCad PCB Editor indicating that conductive features assigned to different electrical nets physically intersect or collide.

Label Connects More Than One Wire

This KiCad Electrical Rules Checker (ERC) violation occurs when a net label is placed precisely at the intersection of two crossing, unconnected wires, making it ambiguous which net the label should name.

KiCad ERC: Label not connected to anything

During an Electrical Rules Check (ERC) in the Schematic Editor, KiCad emits this diagnostic when a local, global, or hierarchical label is placed on the schematic but its attachment point is not electrically connected to any wire, pin, or bus.

Local and global labels have the same name

KiCad's Electrical Rules Checker (ERC) warns when a local label and a global label share the exact same text identifier, preventing ambiguous connectivity and unlinked nets across hierarchical schematic sheets.