KiCad DRC: Extra Footprint (extra_footprint)

Diagnostic signature

Extra footprint

KiCad emits the 'Extra footprint' DRC diagnostic (rule key 'extra_footprint') during schematic parity checks when a footprint resides on the board layout without an associated symbol in the project schematic.

What it means

The 'Extra footprint' violation indicates a schematic-to-layout synchronization mismatch. KiCad's Design Rules Checker compares the active PCB layout against the design netlist and symbol definitions in the linked schematic. If DRC finds a footprint placed on the PCB that has no corresponding symbol entry (matched by UUID path or reference designator) in the schematic database, this diagnostic is flagged. By default, KiCad assigns this parity violation a Warning severity.

Why it happens

KiCad's schematic parity test provider (DRC_TEST_PROVIDER_SCHEMATIC_PARITY) emits DRCE_EXTRA_FOOTPRINT under the following conditions: 1. Manual PCB Placement: A footprint (such as an extra passive, test point, connector, or mounting hole) was placed directly in PCB Editor without placing and linking a corresponding symbol in the schematic. 2. Schematic Symbol Deletion Without Board Pruning: A schematic symbol was deleted from Eeschema, but the PCB was not updated using 'Update PCB from Schematic', or the update was performed with 'Delete footprints with no symbols' unchecked. 3. Broken Parity / Re-annotation: A schematic symbol's reference designator or instance UUID changed without pushing updates to the board, causing the existing board footprint to become an orphan. 4. Excluded from Board: A schematic symbol was marked with the 'Exclude from board' attribute while its footprint remained on the board layout.

Minimal reproduction

(kicad_pcb (version 20240108) (generator pcbnew) (generator_version "9.0")
  (general (thickness 1.6))
  (paper "A4")
  (layers
    (0 "F.Cu" signal)
    (31 "B.Cu" signal)
    (36 "B.SilkS" user "B.Silkscreen")
    (37 "F.SilkS" user "F.Silkscreen")
    (38 "B.Mask" user)
    (39 "F.Mask" user)
    (40 "Edge.Cuts" user)
  )
  (footprint "Resistor_SMD:R_0805_2012Metric" (layer "F.Cu")
    (uuid "00000000-0000-0000-0000-000000000001")
    (at 100 50)
    (property "Reference" "R1" (at 0 -1.5 0) (layer "F.SilkS"))
    (property "Value" "10k" (at 0 1.5 0) (layer "F.Fab"))
    (path "/00000000-0000-0000-0000-000000000001")
  )
  (footprint "Resistor_SMD:R_0805_2012Metric" (layer "F.Cu")
    (uuid "00000000-0000-0000-0000-000000000002")
    (at 110 50)
    (property "Reference" "R2" (at 0 -1.5 0) (layer "F.SilkS"))
    (property "Value" "1k" (at 0 1.5 0) (layer "F.Fab"))
    (path "/00000000-0000-0000-0000-000000000002")
  )
)

How to fix it

Synchronize the layout with the schematic by either purging unassociated footprints from the board or adding corresponding symbols in the schematic editor.

```kicad_pcb
(kicad_pcb (version 20240108) (generator pcbnew) (generator_version "9.0")
  (general (thickness 1.6))
  (paper "A4")
  (layers
    (0 "F.Cu" signal)
    (31 "B.Cu" signal)
    (36 "B.SilkS" user "B.Silkscreen")
    (37 "F.SilkS" user "F.Silkscreen")
    (38 "B.Mask" user)
    (39 "F.Mask" user)
    (40 "Edge.Cuts" user)
  )
  (footprint "Resistor_SMD:R_0805_2012Metric" (layer "F.Cu")
    (uuid "00000000-0000-0000-0000-000000000001")
    (at 100 50)
    (property "Reference" "R1" (at 0 -1.5 0) (layer "F.SilkS"))
    (property "Value" "10k" (at 0 1.5 0) (layer "F.Fab"))
    (path "/00000000-0000-0000-0000-000000000001")
  )
)
```

Step 1

To remove obsolete footprints: In PCB Editor, open Tools -> Update PCB from Schematic (or press F8), check 'Delete footprints with no symbols', and click 'Update PCB'.

Step 2

To keep the component as part of the electrical design: Open the Schematic Editor (Eeschema), add the missing symbol with the corresponding reference designator and footprint assignment, then update the PCB from schematic (F8).

Step 3

To manually remove an unwanted footprint: Select the offending footprint directly in the PCB Editor canvas and press Delete.

Step 4

For standalone mechanical parts (mounting holes, fiducials): Either add mechanical symbols to the schematic so parity is preserved, or manage rule severity in Board Setup -> Design Rules -> Violation Severity.

Upstream references

KiCad KiCad 9.0.9, documentation revision 152cd19e — Schematic parity DRC checks — retrieved 2026-08-11

pcbnew/drc/drc_test_provider_schematic_parity.cpp - KiCad Source Code

pcbnew/drc/drc_item.h - DRC Error Codes Enum