Via is not connected or is connected on only one layer

Diagnostic signature

Via is not connected or is connected on only one layer

A Design Rule Check (DRC) violation indicating a via fails to connect copper on multiple layers, rendering its through-hole functionality useless.

What it means

The PCB Editor's DRC engine has detected a via that does not fulfill its fundamental purpose. Vias exist to conduct an electrical connection between at least two different routing layers. This diagnostic indicates that the via is completely isolated (not touching any routed traces or copper zones on any layer), or it only connects to copper on a single layer. In either scenario, the via acts as an isolated pad or a dead stub rather than a cross-layer conduit, which means a required multi-layer connection is missing or the via itself is unnecessary.

Why it happens

This error is typically caused by manual routing artifacts. A user might place a via to transition a track to a new layer but cancel the routing operation before finishing the target trace, leaving behind a single-layer connection. It also frequently occurs when tracks are deleted or relocated, stranding a via that was previously part of a complete multi-layer route. Less commonly, it can happen if a via is physically placed within a solid internal plane but assigned to a different net, preventing the via from making an electrical connection to that plane.

Minimal reproduction

(kicad_pcb (version 20240108) (generator "pcbnew")
  (layers
    (0 "F.Cu" signal)
    (31 "B.Cu" signal)
  )
  (net 0 "")
  (net 1 "Net-(TestVia-Pad1)")
  (segment (start 100 100) (end 110 100) (width 0.25) (layer "F.Cu") (net 1))
  (via (at 110 100) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1))
)

How to fix it

Either remove the redundant via if it is no longer needed, or complete the routing on a second layer to establish a valid cross-layer connection.

```KiCad PCB S-Expression
(kicad_pcb (version 20240108) (generator "pcbnew")
  (layers
    (0 "F.Cu" signal)
    (31 "B.Cu" signal)
  )
  (net 0 "")
  (net 1 "Net-(TestVia-Pad1)")
  (segment (start 100 100) (end 110 100) (width 0.25) (layer "F.Cu") (net 1))
  (via (at 110 100) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1))
  (segment (start 110 100) (end 120 100) (width 0.25) (layer "B.Cu") (net 1))
)
```

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Upstream references

KiCad PCB Editor 8.0 - Electrical DRC checks

KiCad PCB Editor 7.0 - Electrical DRC checks